The CSA division supplies sensors that bridge the gap between the world we live in and the digital world of machines. By converting physical signals - heartbeats, sounds, light waves - into data, we enable robots, cars and other devices to interact with people and improve our world. What drives CSA is a relentless desire to contribute to technology and have a meaningful impact on the world. This business thrives on solving complex problems and partnering with global leaders at the forefront of technological advancement. Our goal: to push the boundaries of sensor technology and empower innovators to make the world smarter, healthier and happier.
Verification of mixed-signal CMOS ICs and IP blocksDefine verification plans for mixed-signal circuits and ensure adequate verification coverage to enable bug free silicon manufacturingModel analog and mixed-signal blocks using a high-level description language (e.g. SystemVerilog, VerilogAMS)Create DV (Design Verification) test cases, run associated simulations and debug the resultsLead and mentor less experienced DV engineersPromote cutting-edge DV methodologies and make their use available to the communitySuccessfully completed university degree in Electronics, Electrical Engineering, Physics or comparableSeveral years (~7 years) of professional experience in mixed-signal design/verification with hands-on experience with relevant design/simulation toolsSolid knowledge of design verification methods, tools and languages (Digital Mixed-Signal simulation, SystemVerilog, UVM, assertions …)Experience in analog block modelingAnalytical mind to solve complex problems and debugging skillsTeam-oriented and ability to mentor less experienced engineersStrong commitment to deadlines and the advancement of the DV disciplineGood communication skills and proficiency in English
#J-18808-Ljbffr