Uvm Developer Kgs-857

Project description

We are looking for a seasoned UVM Developer to lead our efforts in creating robust verification environments for complex semiconductor devices. This role demands deep expertise in using cutting-edge simulation tools, primarily Xcelium, to drive functional simulations and comprehensive documentation. The successful candidate will play a pivotal role in enhancing our product reliability and accelerating our time-to-market.

Skills Must have Proven expertise in Universal Verification Methodology (UVM) for creating and managing test benchesProficiency with simulation tools like Xcelium or similar environments for functional simulation of digital designsStrong analytical skills to interpret complex design specifications and simulation resultsExcellent problem-solving abilities, with a keen attention to detail in troubleshooting and optimizing verification environments Nice to have Experience with other verification languages and methodologies such as SystemVerilog, OVM, or VMMFamiliarity with ASIC design flow and constraintsPrior experience in the semiconductor or electronics manufacturing industries
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