Senior Digital Ic Verification Engineer - Risc-V

Job Opportunity: Digital Verification Engineer Exciting opportunity to work on the latest cutting-edge RISC-V technology in the semiconductor industry. In this new role as digital verification engineer, you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, ARM & CPU architecture, PCIe protocols, and machine learning.

I am looking to speak with digital verification engineers with 5+ years of experience who have the following skills:

Required Skills: Education: Masters or PhD degree in Electronics / Microelectronics or similar field Experience: 5+ years' experience in UVM environments & process ASIC / FPGA development Verification Knowledge: System Verilog for IP / SOC Verification of digital ICs / ASIC IP or chips complex ASIC designs & architecture for advanced technology nodes Verification Metrics: Definition, coverage analysis, and debugging skills Environment Setup: Knowledge and experience on setting up an ASIC Verification environment, methodology, and flow Tools: vManager, vPlan and Regressions, etc. Digital Test Plan: Definition / creating / set-up test benches Scripting / Coding Skills: C/C++, Python, etc. Bonus Skills: RISC-V / CPU / GPU (this is a bonus, not required) Knowledge of SOC verification is also a bonus ***Visa sponsorship can be offered if required (dependent on experience/qualifications)***

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