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Senior Asic Design & Verification Engineer Mm-799

Detalles de la oferta

Everything we do is designed to challenge the limits of imaging and sensing technologies. We thrive on excellence in execution while having fun pushing the boundaries of what an image can express. We offer a permanent contract with a competitive salary and career opportunity in a growing company with global coverage and ambition. There's still a lot of work to be done. We need best in class optical designers, software, parallel computing, heterogeneous computing, and digital image processing experts.Interested in Joining photonicSENS? We Are Always Looking for New Talent!Senior ASIC Design & Verification Engineer Experienced Microelectronics design and verification engineer to develop an innovative low-power consumption ASIC to deliver high-quality depth maps and images by processing real-time video frames captured by apiCAM, our leading state-of-the-art 3D camera. ApiCAM offers simultaneously 2D and 3D images with a single lens, currently at 30 fps (frames per second), higher in the future. ApiCAM is available in commercial products for Medical Imaging, Robotics, Industry 4.0 and aims to be in the next generations of XR-glasses, Tablets, PCs and Smartphones.You will join the Algorithms team to improve and implement state-of-the-art depth and imaging algorithms efficiently on FPGAs and finally within an ASIC. This Team is part of our R&D Department with experts in Physical-Optics, Image-Processing, Algorithms, Software and Industrial Automation.Responsibilities Integration and Formal Verification of a complex digital design composed by multiple HDL-blocks developed by members of our Digital Design and Verification Groups as well as IP-blocks from third parties.Porting our current algorithms to an ASIC.Definition of the hardware-software architecture that guarantees the lowest power consumption, as well as maximum speed and precision in the calculations.Development of the hardware system using Xilinx development tools for FPGAs.RTL coding, simulation and verification.Choice of the target digital process. RTL porting to the targeted ASIC-process.Development of the control software for our camera.C/C++ developments for embedded microprocessors (within FPGAs and ASICs).Development of techniques to reduce computational costs.Requirements Bachelor, Master or PhD in Telecommunication, Electronics, Computer Science or related fields.5+ years' experience working on the design of complex FPGA and ASIC systems.Experience in RISC-V and/or ARM embedded architectures.Extensive experience in HDLs-Hardware Description Languages (Verilog and/or VHDL).Ability to integrate third party IPs.Development of testbenches for the verification of digital designs (Verilog, SystemVerilog, UVM...).Version control software such as Git or SVN.Signal processing in software such as Matlab, Python and/or C++.Analysis of complex algorithms and problems to find creative and innovative solutions.#J-18808-Ljbffr


Salario Nominal: A convenir

Fuente: Jobtome_Ppc

Requisitos

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