Research Engineer - Cache Hierarchy And Interconnects

Research Engineer - Cache Hierarchy And Interconnects
Empresa:

Barcelona Supercomputing Center (Bsc)


Detalles de la oferta

.Job Reference584_24_CS_UNCORE_RE1PositionResearch Engineer - Cache Hierarchy and Interconnects (RE1)Closing DateSaturday, 31 August, 2024Reference: 584_24_CS_UNCORE_RE1Job title: Research Engineer - Cache Hierarchy and Interconnects (RE1)About BSCThe Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, and is committed to research, development, and management of information technologies to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth, and engineering sciences) under one roof, and currently has over 1000 staff from 60 countries.Context And MissionApplications are invited for an undergraduate student in High Performance Computing (HPC) architectures at the Barcelona Supercomputing Center (BSC). BSC intends to pave the way to the future low-power European processor for Exascale in the context of multiple architecture initiatives (EPI, Lenovo, Intel, etc.).Key DutiesImplement novel features in the cache hierarchy and the on-chip interconnection network of RISC-V based HPCP processorsAnalyze the performance of RISC-V based HPC processors, with special emphasis on the cache hierarchy and the on-chip interconnection networkIdentify and solve performance bottlenecks in the cache hierarchy and the on-chip interconnection networkRequirementsEducationBS or MS in Computer Science, Computer Engineering or Electrical Engineering. Previous industrial experience is a big plus.Essential Knowledge and Professional ExperienceComputer Architecture: microarchitecture, resource sharing in multicores, cache hierarchy, interconnection network.Performance Analysis and Tuning of parallel applications.Programming: C/C++, Assembler, SystemVerilog, Verilog, VHDL, etc.Additional Knowledge and Professional ExperienceExcellent written and verbal communication skills in English.CompetencesAbility to take initiative, prioritize and work under set deadlines pressure.Ability to work independently and in a team.Capacity to interact and build strong relations with other research groups.ConditionsThe position will be located at BSC within the Computer Sciences DepartmentWe offer a full-time contract (37


Fuente: Jobtome_Ppc

Requisitos

Research Engineer - Cache Hierarchy And Interconnects
Empresa:

Barcelona Supercomputing Center (Bsc)


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