Openchip is a European Silicon Engineering Company, headquartered in Barcelona, Spain. We aim to democratize the usage of Chips by developing Systems on Chip (SoCs) that combine RISC-V and accelerated chiplets for AI and HPC, everything interconnected with UCIe open interfaces. Our technologies will provide value in multiple fields such as Artificial Intelligence, Security and Privacy, and Carbon Footprint Reduction. We are willing to change the Silicon Industry and help build a more sustainable world, where collaboration and openness are by default. Our chips will be used in High Performance Computing, Autonomous Driving, Telecommunications, Personalized Medicine, Edge Computing, and Cloud.We can offer you an exciting career path in a multicultural and multinational environment where innovation, teamwork, and trust are in our DNA. You will have the opportunity to learn from senior professionals, use the most advanced technologies to develop chips, and participate in one of the most relevant technological projects in the European Union. We are actively seeking a Memory Architecture Director to join our dynamic team.About the FunctionThe Memory Architecture team consists of a multi-disciplinary group focused on architectural aspects of all memories in the SoC and works on potential innovative Non-Von-Neuman Architecture. Specifically, the team identifies the optimum memory micro-architecture choices using performance and power analysis. The team will identify the architecture guidelines for memory size, parallelism, and protocol compliance for the SoC.Job ResponsibilitiesThe MEMORY ARCHITECTURE LEAD in SILICON ARCHITECTURE OFFICER at Open-Chip is chartered with defining the architectural aspects of all memories for System-on-Chip (SoC) designs. This encompasses cache memories, main memories (DRAM, HBM), storage (NVM), and compute in memory (CIM) architecture for AI. In this Technical Leadership role, you will collaborate closely with customers, business leaders, experts, software/solution teams, and the DESIGN team within the System Architecture group. It's an exciting opportunity to drive innovation and create optimized SoC solutions for both current and next-generation products. Your responsibilities will include, but are not limited to:Cache architecture development, cache hierarchy, and coherence protocol definition.DRAM and HBM interface integration.Flash storage power optimization.Identify CIM alternative architecture to eliminate memory-wall for AI-ML applications.Development, assessment, and refinement of Architecture to target power, performance, area, and timing goals.Skills• 20+ years of prior experience in developing memory IP and delivering hardware products or solutions.• System-level understanding (at a minimum) of one of the following subsystems of the SoC: Memory IP, eNVM IP, NOC, AI, Security, with demonstrated technical skills spanning hardware, software, algorithms, software stack/tools, libraries, and frameworks.
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