SUMMARY
Qorvo is seeking an EDA Applications Engineer responsible for defining, developing and standardizing reticle build and tapeout flows for RF Integrated Circuit and module products.
The candidate will be responsible for designing, developing, refining, and documenting reticle build and tapeout flows.
Key tasks include architecting innovative reticle build flows that standardize work across Qorvo's global tapeout areas.
The candidate will support circuit designs using semiconductor processes such as SOI, CMOS, and III-V technologies, including module design.
Tasks also include collaborating with technology development, software development, business units, and fab engineering teams.
RESPONSIBILITIES:Define, architect, and improve reticle build and tapeout flows.Define and fan out standards across different teams.Work with a software development team to turn requirements and definitions into usable tools and applications.Assist Qorvo community that uses the tools and flows managed by the team.Determine and benchmark new EDA tools and platforms while identifying gaps and areas needing improvement.Guide tapeout flow automation and customized reticle build tools to improve productivity.Create requirement documents for delivery to software development team.QUALIFICATIONS:MSEE or BSEE with 10+ years of experience with analog or RF circuits.Recent college graduates will be considered with relevant internship experience with analog or RF circuits.Familiarity with high performance RFIC, MMIC, and module design flows.Proficiency with major electronic design automation (EDA) software platforms (e.g. Cadence Virtuoso, Keysight ADS, Cadence / AWR Microwave Office).Strong verbal and written communication skills.Able to work and communicate effectively in a diverse, cross-functional engineering climate.Leadership skills in a multidisciplinary team environment.Microsoft Office proficiency.
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