We are actively seeking a Senior Design Engineer to join our dynamic and growing digital design team.
The Role: Drive design execution of silicon design from definition through product launch and act as primary point of contact for IP development and IP integration in SoC.Collaborate with a multidisciplinary project team consisting of architecture, microarchitecture, IP providers, and SoC design for silicon products with a focus on product execution.Work in tight collaboration with emulation, verification, and validation development teams to ensure bug-free design.Work across IP and SoC development teams to ensure delivery of complex silicon design projects, ensuring quality and performance.Ensure that the final design meets key factors such as power, performance, area, and cost requirements.Continuously improve silicon development processes and architecture definition.Work with post-silicon validation, manufacturing, platform, and software stakeholders throughout the product development cycle to meet end user needs through definition, design, validation, and support phases.Ensure that the IP needs of the SoC integration team are met by working with internal/external IP providers; IP arrives on time, meets quality standards, and manages the development of the SoC itself as required.Mentor digital designers of the team and act as a reference point for specific knowledge.Qualifications: Minimum Qualifications: Bachelor's/Master's degree in Electronics/Electrical Engineering, Computer Engineering, Computer Science, or a related field.7+ years of experience in silicon development including multiple project development life cycles and product/project management.Good knowledge of u-processor architecture, bus architecture, SoC design, and test architecture/implementation.Deep knowledge of digital design from RTL to GDSII, including RTL writing, synthesis, static timing analysis, formal verification, scan insertion, and ATPG.Very good knowledge of hardware description languages: Verilog, SystemVerilog, VHDL with good style for RTL coding and linting checks.Good knowledge of clock/reset synchronization.Good knowledge of power management and UPF description.Good knowledge of scripting language: TCL.Preferred Qualifications: Knowledge of network on chip architecture.RISC-V ISA/architecture and SoC based on this processor.Knowledge of high-level (architecture) digital design language.Knowledge of architecture analysis tools used for metric analysis.Good knowledge of scripting languages: Perl, Python.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences, and/or schoolwork/classes/research.
We are looking for team players that focus on the outcome of the team above individual needs, with respect and honest challenge, within- and cross-team collaboration at the technical level.
The ideal candidate should have a "can-do attitude", willing to solve any obstacle independently, and be self-starter and self-motivated.
What do we offer? Join an innovative team and experience company growth.We believe in investing in our employees and providing them with the opportunities they need to grow and develop their careers.Enjoy a hybrid work environment.We also offer a flexible schedule.We offer a remuneration that values your experience.The role can be based in Barcelona (Spain) or Rome (Italy).We are looking for outstanding people willing to join our mission to change this industry and help to build a better world. If you feel identified with Openchip, please contact us. We can offer a competitive compensation package in a flexible work schema that will help you to maintain a balance between your personal and professional life. At Openchip & Software Technologies S.L., we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued, respected, and empowered to reach their full potential – regardless of race, gender, ethnicity, sexual orientation, or gender identity.
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