Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $12 billion in FY22 and approximately 25,000 people globally working alongside 125,000 global customers, ADI ensures today's innovators stay Ahead of What's Possible.
Mixed-Signal Verification Engineer ADI's Precision Converters Group is seeking Analog/Mixed signal Verification Engineers to verify new integrated circuits and support assigned products through the full product life cycle.
Responsibilities Acting as a mixed signal verification team member in a multi-disciplinary (Digital/Analog/DV/Implementation/Layout) multi-site development team Verification of full chip-level functions, including interfacing, required to implement new converter products in a wide range of application spaces Work with Analog Design for the generation of behavioral models of analog sub-circuits in any of their possible forms (AMS, C++, SystemVerilog, DMS, …) Generate model validation plans and provide model usage support in full chip level verification functions Interact with rest of DV Team to develop directed and constrained random test cases for verification of analog functions within a mixed-signal verification environment Planning and scheduling of verification tasks and liaison with development team members Presentation of progress at key milestones throughout the design cycle Researching and developing new methods and processes of verification Qualifications/Skills Electronic Engineering/Computer Engineering/Electrical Engineering degree with 2+ years of experience in analog/mixed-signal design verification Well versed in standard verification flows during IC design Understanding of mixed-signal circuits (heavy digital/analog interaction) and its trade-offs when it comes to their verification Ability to deal with ambiguity Verification plan development from specification/standards Strong debugging and problem solving skills Strong written and verbal communication skills, including technical presentations Strong coding, object-oriented programming, and documentation skills Hands-on experience with System Verilog and (preferably) UVM would be an advantage Knowledge of communication protocols like SPI, I2C and data converter architectures would be an advantage Experience with a scripting language (Python, C, Perl, etc.) would be an advantage Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
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